The present invention relates to computer systems in which components may be adjusted to change electrical power consumption and performance, and in particular to a computer architecture that exposes information about electrical power consumption and performance responsive for different operating states under particular workloads to allow energy/performance informed adjustment of the components under varying workloads.
Electrical power consumption is a significant constraint in electronic computer design and use. These constraints result both from a need to conserve power (to save power costs for data centers and to prolong the operating life of battery-operated devices) and the need to manage heat dissipation in devices with increasing transistor density.
Modern processors provide the ability to adjust the operating states of their component computational resources to vary the trade-off between energy consumption and computational performance. For example, the operating voltage and/or clock frequency of the processor may be lowered to reduce the processor energy consumption with a corresponding decrease in processor execution speed. Similar adjustments may be made in cache sizes, memory access speeds, and data communication channels within the computer system to change the relative performance/energy consumption.
While each of these adjustments in operating state tend to change the performance/energy consumption in a predictable direction, the interaction of the adjustments can be unexpected and the actual impact on overall system performance and energy consumption is not quantified. For this reason, precise adjustment of the electronic computer to a particular power limit or performance standard is not possible.